Transformation of transparent march tests into symmetric tests

Semiconductor memories are currently used in all digital systems, including mission-critical systems, where the testing process of individual components must take place periodically during the normal operation of the entire system. In the case of RAM and periodic testing, transparent march tests play a very important role. One of the most interesting techniques allowing for the implementation of transparent tests is the technique based on symmetric tests. This article presents a method for transforming any asymmetric march test into a symmetric form.March tests [1-3] play a key role in memory testing techniques. They are currently the most commonly used tests in the memory testing process.
A march test consists of a finite number of March elements. A March element (test phase) consists of a finite number of operations, all of which act on a specific cell before moving to the next memory cell. The next cell is determined by the addressing mode, which can be increasing, where addresses increase from 0 to N-1, denoted by ⇑, or decreasing, where addresses decrease from N-1 to
0, denoted by ⇓. In some cases, the addressing mode can be chosen arbitrarily, which is denoted by ⇑. (…)

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